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Side-Channel Attacks: Low-Cost Correlation Power Analysis of AES on Embedded Devices

Contribution type: article

Title: Side-Channel Attacks: Low-Cost Correlation Power Analysis of AES on Embedded Devices

Authors:

Jörn-Marc Schmidt, IU International University of Applied Sciences, Germany
Alexander Lawall, IU International University of Applied Sciences, Germany

Keywords: Side-channel attacks, Correlation Power Analysis (CPA), AES, embedded systems security, hardware security

Abstract:

Side-channel attacks exploit unintended physical leakages such as power consumption to compromise cryptographic implementations. Despite extensive research, practical experimentation typically requires costly and specialized equipment, limiting accessibility. This paper investigates whether effective power-based side-channel analysis can be achieved using low-cost hardware. The research goal is to evaluate the feasibility, effectiveness, and limitations of budget-constrained attacks. Accordingly, the study addresses the following questions: (i) Can inexpensive hardware enable reliable key recovery? (ii) What are the limitations regarding noise, sampling rate, and signal quality? (iii) How does clock frequency influence attack success? An experimental methodology based on Correlation Power Analysis (CPA) is applied to answer these questions. A Raspberry Pi Pico 2 is used to capture power traces from an ATtiny85 microcontroller executing Advanced Encryption Standard (AES) operations. The traces are analyzed using a Hamming-weight leakage model and Pearson correlation under varying clock frequencies. The results demonstrate that successful key recovery is achievable with minimal hardware, confirming the practical feasibility of low-cost side-channel attacks. However, limitations related to noise, trace alignment, and hardware constraints affect robustness. This work highlights critical security implications for embedded systems and contributes a reproducible, low-cost experimental framework.

Publication Date: June 7, 2026

Presented during:

Dates: June 7, 2026 to June 11, 2026

Location: Porto, Portugal

Venue:

Hotel Novotel Porto Gaia

Rua Martir Sao Sebastiao, Afurada,
4400-499 Vila Nova de Gaia

Hotel website

Copyright (c) DTR Society, 2026

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